These are some plex86 performance oriented ideas/todos/etc.


Use more than one page for virtualized code cache.  Right
  now, each out-of-page branch dumps the cache and starts over.
  Ugh!  Anyways, some code is in there for handling N pages,
  but it needs to be extended.  Other framework needs to be
  added - marking phy pages etc.

Writes to vcode cache could invalid cache small regions rather
  than whole page if no instructions are stepped on.

Handle string IO, N operations at a time, rather than
  1 at a time.  This is really bogging down performance.
  Have to consider paging and page boundaries, segment limits,
  timing issues, and debug single stepping etc here.

Can we let the currently executing code page READ itself?
  Currently, the D TLB entry is loaded to protect any access.
  While we're loading the I TLB, perhaps load the D entry.

Could software breakpoints (INT3) invoke handler directly,
  rather than generate #GP because of lack of permission from
  guest at ring3.

Use COSIMULATE macro in kernel/ for trim code when it's
  not used.

If current instruction known to be virtualized, no need
  to try running it, only to generate a trap. (SBE code)

If we virtualize a near branch instruction only because
  we are at the maximum recursion level, then we could
  unvirtualize it later on another pass, when the current
  level is lower?

Need guest OS specific driver/pseudo-emulation interface.

Need memzero specifically for pages.

Optimize memzero,memcopy functions

Only do cache_sreg when not already cached

Move important parts of hardware emulation to monitor
  space?  DMA, disk, floppy, video, etc, timer, ...

Different x86 modes (v86-mode for example) can have their
  own opcode virtualization map.  There are only a few instructions
  to virtualize for that mode, if running using v86 mode.

Remove levels of indirection posed by plugin.c.

Optimize multi-byte reads/writes to VGA

Optionally, let ring3 guest code run without SBE intervention.
  Need a set of criteria for when this is possible, and should
  be controlled by user conf file setting.

Ioctl which marks cache as invalid, should only invalidate
  an address range, rather than all of the cache.

Could control virtualization of each seg reg individually.

Use a better messaging system between user space and monitor.
  Possibly queue more than one message at a time.  Could use
  memory mapped page(s).
